How Your Computer Thinks : Instruction Cycle Explained Visually

vinaysingh — Wed, 29 Oct 2025 15:13:49 +0000

What you just saw is your computer's first thought or the very first step to execute a task at the architecture level.

The Program Counter sends the address of the next instruction(not the instruction itself) to the Memory Address Register(MAR).

Then, through the Address Bus, that address passes to the TLB(Translation Lookaside Buffer) which converts logical address into a physical one.

it's like turning street name such as Fifth Avenue into its exact GPS coordinates.

Once the location is found, the actual instruction(GPS Coordinates) flows back through the Data Bus into the Instruction Register.

here,

Fifth Avenue street name is Logical Address of the Instruction
GPS Coordinates is physical address of the Instruction(which represents data of opcode, operand, address and destination).

Now that the instruction is fetched, its now time for decoding and executing.

The Control Unit(CU) decodes the instruction and sends command signals through Control Bus, The Memory Unit(MU), responding to those signals, fetches the required data and sends back through the Data Bus to the Arithmetic Logic Unit(ALU).

Once the ALU finishes executing the operation, whether its addition, comparison, or moving data. The result is placed into a special register called Accumulator.

And this Completes the Full Instruction Cycle
Fetch --> Decode --> Fetch(operands) --> Execute.

In our next blogs we'll explore

what if the data is in Cache, or SSD/HDD?
what if TLB fails to translate the logical address?

Note: The above videos are logical representation of Data and Control flow in Computer Architecture, not the exact physical representation.

Forem: vinaysingh

How Your Computer Thinks : Instruction Cycle Explained Visually